Memory Defenses -- the Elevation from Obscurity to Headlines
Abstract: Several recent demonstrations have highlighted that modern processors are likely being shipped with latent vulnerabilities. To handle a large suite of possible attacks, processors may need to incorporate an array of defenses. Attacks like Meltdown and Spectre may have finally pushed these defenses from the shadows of academia into possible commercial reality.
This talk will describe three primary vulnerabilities in the memory system, and efficient hardware defenses to address each of these vulnerabilities. The first vulnerability is leakage of a program's memory intensity through memory controller timing channels. The second is a violation of memory integrity. The third is leakage of a program's memory access pattern through exposed DDR buses. With recent innovations, the performance overheads of defenses for the first two vulnerabilities have been reduced to under 2X, while much work remains for the third vulnerability. The talk will end by discussing the potential intersection of new memory technologies and new security primitives.
About the Speaker: Rajeev Balasubramonian is a Professor at the School of Computing, University of Utah. He received his B.Tech in Computer Science and Engineering from the Indian Institute of Technology, Bombay in 1998. He received his MS (2000) and Ph.D. (2003) degrees from the University of Rochester. His primary research interests include memory systems, security, and application-specific architectures. Prof. Balasubramonian is a recipient of a US National Science Foundation CAREER award, an IBM Faculty Partnership award, an HP Innovation Research Program award, an Intel Outstanding Research Award, various teaching awards at the University of Utah, and multiple best paper awards. He was elevated to IEEE Fellow in 2021 for contributions to in-memory computation and memory interface design.