HPLP Lab News

News and updates from the High Performance Low Power research group


    Our alumnus Dave Garrett is honored with the 2021 School of Engineering Achievement Award

    October 31, 2021

    Dave Garrett who is an alumnus of HPLP and the VP of HW Engineering at Syntiant Corp is honored with the 2021 School of Engineering Achievement Award by the University of Virginia School of Engineering and Applied Science.

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    Congrats to HPLP students on getting best student paper award nomination in IEEE World Forum on the Internet of Things (WFIoT) 2021

    October 11, 2021

    Mohammad Nazmus Sakib, Rahul Sreekumar, Vaibhav Verma, Tommy Tracy II and Mircea R. Stan's paper titled "ATCPiM: Analog to Time Coded Processing in Memory for IoT at the Edge" is presented in in IEEE World Forum on the Internet of Things (WFIoT) 2021. The paper was nominated as one of the top 5 student papers in WFIoT 2021.


    Journal Paper accepted to Journal of Applied Physics, 2021

    October 11, 2021

    Hamed Vakili, Jun-Wen Xu, Wei Zhou, Mohammad Nazmus Sakib, Md Golam Morshed, Timothy Hartnett, Yassine Quessab, Kai Litzius, Chung T. Ma, Samiran Ganguly, Mircea R. Stan, Prasanna V. Balachandran, Geoffrey S. D. Beach, S. Joseph Poon, Andrew D. Kent, and Avik W. Ghosh's paper titled, "Skyrmionics—Computing and memory technologies based on topological excitations in magnets" has been published in the Journal of Applied Physics, vol. 130, no. 7, 2021.


    Conference Paper accepted to the 4th IEEE International Symposium on Device, Circuit and System (IEEE ISDCS) 2021)

    October 11, 2021

    Jun-Han Han, Robert E. West, Karina Torres-Castro, Nathan Swami, Samira Khan and Mircea Stan's paper titled, "Power and Thermal Modeling of In-3D-Memory Computing" has been presented at the 4th IEEE International Symposium on Device, Circuit and System (IEEE ISDCS), March 3-5 2021.



    Congrats to Vaibhav and Sakib for receiving UVA Endowed Graduate Fellowship awards

    October 07, 2021

    Vaibhav Verma and Mohammed Nazmus Sakib were recently awarded the UVA Engineering  Endowed Graduate Fellowship award. As a part of the fellowship, they will each receive a  $5,000 addition to the graduate recipients academic-year stipend and a $5,000 research account. Congrats to them both!


    Congrats to HPLP students on being accepted towards presenting at TECHCON'21

    September 30, 2021

    Elisa Pantoja and  Mohammad Nazmus Sakib had their work presented at this year's SRC TECHCON'21. Their research focuses on developing "Batteryless, chip-less RFID printable sensor technlogy" and "Skyrmionic based temporal memory logic", respectively. Congrats to them both!!


    Follow our alumnus Dave Garrett's blog post

    September 02, 2021

    HPLP alumus, Dave Garrett an alumnus of HPLP and is the VP of HW Engineering at Syntiant Corp is publishing blog posts on CMOS power dynamics and ML system design from a hardware perspective. Follow his blog posts, linked below:

    Link to Blog Post


    Our undergraduate ASIC design team has passed the first round in the 2021 IEEE SSCS PICO Design Contest

    August 18, 2021

    TIDENet

    Our undergraduate ASIC design team has passed the first round in the 2021 IEEE SSCS PICO Design Contest with the project of TIDENet: TinyML Image Detection on the Edge with Neural Networks. We are selected as one of the 18 out of 61 submissions.


    Our project, Mircea Stan as co-PI, is awarded an NSF Grant

    August 18, 2021

    Project Title: ASCENT: Ferroelectric-based Compute-in-Memory Dynamical Engine (Ferro-CoDE) to Solve Hard Combinatorial Optimization

    Profs. Nikhil Shukla (ECE & MSE), Jon Ihlefeld (MSE & ECE) and Mircea Stan (ECE), who along with Prof. Vijaykrishnan Narayanan (Penn State) have just been awarded a 4 year NSF grant.

    The team will design, fabricate and demonstrate a Ferroelectric Hafnium Oxide (HfO2) based Compute-in-Memory (CiM) Dynamical Engine (FerroCoDE) that leverages the rich non-linear analog dynamics of oscillators in conjunction with the area and energy efficiency of ferroelectric CiM architectures to accelerate the computationally hard maximum satisfiability problem.