Research Areas

Hardware Accelerators

  • AI RISC- Scalable Processor with AI Extensions

    AI RISC- Scalable Processor with AI Extensions

    HPLP members involved: Vaibhav Verma and Nick P. Moon


    AI_RISC is a hardware/software codesign solution for future edge devices which incorporates AI functionality into the CPU by adding the AI hardware units to the processor core, new AI extensions to the ISA and provide software support to make it easy for programmers to target this scalable processor. AI_RISC presents an end-to-end optimized system-level solution for enabling the next generation of AI edge devices. 

    Collaborators:

    GRC@SRC

  • VELVET Chip

    VELVET Chip

    HPLP members involved: Vaibhav Verma


    VELVET is a very-low voltage system-on-chip consisting of an open-source RISC-V processor and a deep neural network accelerator designed with cross-layer reliability techniques to prevent low-voltage processor failures. This heterogeneous system employs circuit, system and application level resiliency techniques to enable reliable low-voltage operation.

Processing in Memory

  • HotSpot - Thermal Cooling techniques for PiM

    HotSpot - Thermal Cooling techniques for PiM

    HPLP members involved: Robert E. West III and Junhan Han


    The thermal performance of Processing in Memory(PiM) 3D IC's  are of critical importance. An emphasis is given on developing a robust thermal modelling network that investigates into novel cooling methods, such as dynamic flow rate microchannels based on the location of hotspots. 3D IC thermal management have been addressed by dynamic thermal management method which controls the direction and magnitude of microfluidic flows in the thermal chamber by multiplexing inlets and outlets.

    Collaborators:

    CRISP@UVA  | CRISP@SRC | Swami Lab

  • PiMulator- FPGA Emulator for PiM

    PiMulator- FPGA Emulator for PiM

    HPLP members involved: Sergiu Mosanu, Ersin Cukurtas


    The run time required for various emerging technologies can be accurately emulated by employing a flexible FPGA spatial fabric. FPGA’s are also introduced to create prototypes for near and in-memory processing.

    Collaborators: 

    CRISP@UVA | CRISP@SRC | ShiftLab |  

  • PiM CLASH - Wearout and Active Recovery

    PiM CLASH - Wearout and Active Recovery

    HPLP members involved: M. Ceylan Morgul, Mohammad Nazmus Sakib


    Our goal is to increase chips’ endurance. Old/used electronics can regain their functionality with either passive or active recovery. Developing an efficient method on recovery is crucial for practicality. Chips need to do exercise.

    Collaborators:

    CRISP@UVA | CRISP@SRC 

Cyber-physical systems

  • Hardware Defense employing Printable Electronics

    Hardware Defense employing Printable Electronics

    HPLP members involved: Elisa Pantoja


    Unwanted access to private intellectual property and circuit designs during manufacturing and distribution has led to a serious need to establish protective measures against malicious attacks. We make use of electronic printing, obfuscation techniques, and design for security to build defense features that protect hardware against malicious modification, reverse engineering, and vulnerability exploitation.

  • Stream Processing

    Stream Processing

    HPLP members involved: Patricia Gonzalez- Guerrero, Rahul Sreekumar


    The idea of an end to end asynchronous system is of great interest for ultra low power applications where there is a clear trade-off between power and accuracy. Stochastic computing when implemented asynchronously proves to be an innovative solution towards lesser hardware and silicon footprint.

Emerging Technologies

  • Spintronics

    Spintronics

    HPLP members involved: Mohammad Nazmus Sakib


    The compact size, high stability and ultra-low depinning current density make skyrmion a potential candidate for future memory technology. Skyrmion can be used to design conservative logic system, stochastic computing. The goal of this project is to design energy efficient memory and logic circuits and systems to replace CMOS based technologies by exploiting the non-volatility of highly stable magnetic skyrmion.