Lab News

Our undergraduate ASIC design team has passed the first round in the 2021 IEEE SSCS PICO Design Contest

Our undergraduate ASIC design team has passed the first round in the 2021 IEEE SSCS PICO Design Contest with the project of TIDENet: TinyML Image Detection on the Edge with Neural Networks. We are selected as one of the 18 out of 61 submissions.

Our project, Mircea Stan as co-PI, is awarded an NSF Grant

Project Title: ASCENT: Ferroelectric-based Compute-in-Memory Dynamical Engine (Ferro-CoDE) to Solve Hard Combinatorial Optimization

Profs. Nikhil Shukla (ECE & MSE), Jon Ihlefeld (MSE & ECE) and Mircea Stan (ECE), who along with Prof. Vijaykrishnan Narayanan (Penn State) have just been awarded a 4 year NSF grant.

The team will design, fabricate and demonstrate a Ferroelectric Hafnium Oxide (HfO2) based Compute-in-Memory (CiM) Dynamical Engine (FerroCoDE) that leverages the rich non-linear analog dynamics of oscillators in conjunction with the area and energy efficiency of ferroelectric CiM architectures to accelerate the computationally hard maximum satisfiability problem. 

Mircea R. Stan presents talk on "Asynchronous Stream Computing for Low Power IoT" at TECHNION - ACRC as a IEEE CASS DL

Mircea R. Stan presents a talk on “Asynchronous Stream Computing for Low Power IoT – Asynchronous Stochastic Computing (ASC), Asynchronous Stream Processing (ASP) and Asynchronous Impulse Radio (AIR) for ubiquitous sensing at the Edge” at TECHNION (Israel Institute of Technology) - Advanced Circuits Research Center (ACRC) as a part of the “ACRC Semiconductor Webinars” series and the IEEE Circuits and Systems Society Distinguished Lectures series.
 

Congrats to Xinfei Guo for his new position of Assistant Professor at UM-SJTU Joint Institute (JI) at Shanghai Jiao Tong University

Xinfei Guo, an alumnus of HPLP, has started his new position at the University of Michigan – Shanghai Jiao Tong University Joint Institute (UM-SJTU JI) at Shanghai Jiao Tong University as an Assistant Professor. Congrats!

Congrats to Robert E. West III for launching HotSpot v7.0 on GitHub

Robert E. West III launched a new version of HotSpot on Github. The new version 7.0 implements the microfluidic cooling feature into the HotSpot simulator. The new feature is expected to broaden the  thermal management options whilst designing 3D microarchitecture. 

What is HotSpot?

HotSpot is an accurate and fast thermal model suitable for use in architectural studies. It is based on an equivalent circuit of thermal resistances and capacitances that correspond to microarchitecture blocks and essential aspects of the thermal package. The model has been validated using finite element simulation. HotSpot has a simple set of interfaces and hence can be integrated with most power-performance simulators like Wattch. The chief advantage of HotSpot is that it is compatible with the kinds of power/performance models used in the computer-architecture community, requiring no detailed design or synthesis description. HotSpot makes it possible to study thermal evolution over long periods of real, full-length applications.

Workshop Paper is accepted to The 17th IEEE Workshop on Silicon Errors in Logic – System Effects 2021

M. Ceylan Morgul, Mohammad Nazmus Sakib and Mircea Stan's paper titled, "Reliably Processing in Flash at High Temperature" is going to be presented at The 17th IEEE Workshop on Silicon Errors in Logic – System Effects (SELSE), 2021.

Congrats to Dave Garett for winning Tiny ML Best product of the year

Dave Garrett, an alumnus of HPLP and is the VP of HW Engineering at Syntiant Corp won the award for the best tinyML product of the year. Congratulations to David and his team on this enormous success. 

Journal Paper accepted towards IEEE Journal on Exploratory Solid-State Computational Devices and Circuits,2020

Hamed Vakili, Mohammad Nazmus Sakib, Samiran Ganguly, Mircea Stan, Matthew W. Daniels, Advait Madhavan, Mark D. Stiles, Avik W. Ghosh's paper titled, " Temporal Memory with Magnetic Racetracks" has been published in the IEEE Journal on Exploratory Solid-State Computational Devices and Circuits

Journal Paper accepted to IEEE TNANO,2020

M. Ceylan Morgul, Luca Frontini, Onur Tunali, Lorena Anghel, Valentina Ciriani, E. Ioana Vatajelu, Csaba Andras Moritz, Mircea R. Stan, Dan Alexandrescu and Mustafa Altun's paper titled, " Circuit Design Steps for Nano-Crossbar Arrays: Area-Delay-Power Optimization with Fault Tolerance" has been published in the IEEE Transactions on NanoTechnology,2020

Mircea R.Stan presents talk on "Processing in Memory (PIM) – Power and Thermal Challenges and Opportunities" at IEEE CASS DL

Mircea R. Stan presents a talk on Processing in Memory (PIM) – Power and Thermal Challenges and Opportunities at the RESMIQ event as a part of the  IEEE Circuits and Systems Society virtual seminar series. The talk addressed the Thermal/Power delivery challenges for PIM that are a result of the increased switching activities inherent to the moving of processing into the memory fabric, and exacerbated by the evolution towards 3D integration due to the slow-down of traditional Moore’s law methods.