HPLP alumus, Dave Garrett an alumnus of HPLP and is the VP of HW Engineering at Syntiant Corp is publishing blog posts on CMOS power dynamics and ML system design from a hardware perspective. Follow his blog posts, linked below:
Link to Blog Post
HPLP alumus, Dave Garrett an alumnus of HPLP and is the VP of HW Engineering at Syntiant Corp is publishing blog posts on CMOS power dynamics and ML system design from a hardware perspective. Follow his blog posts, linked below:
Link to Blog Post