Lab News
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Congrats to Elisa for successfully proposing her Ph.D. thesis
Elisa Pantoja successfully presented her thesis proposal titled, "VCRFID: Industry 4.0 with Virtualized Controller for Computational RFID-based Sensors" in Dec'23. Congrats to Elisa and wish him a successful thesis defense in the near future.
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Yimin's paper LiteAIR5 is at SOCC23
Yimin Gao, Sergiu Mosanu, Mohammad Nazmus Sakib, Vaibhav Verma, Xinfei Guo, and Mircea R. Stan's paper titled "LiteAIR5: A System-Level Framework for the Design and Modeling of AI-Extended RISC-V Cores" has been accepted to be presented and published in the IEEE System-on-Chip Conference 2023.
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We Gave a Keynote Talk at GLSVLSI 2023
Mircea Stan gave a keynote talk titled "20 Years After: New Thermal Challenges in Circuit Design and Architecture" at Great Lakes Symposium on VLSI (GLSVLSI) 2023.
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A Recent HPLP Alumna Patricia won the ISQED'23 Best Paper Award
Or recent alumna Patricia Gonzalez-Guerrero and her team-mates George Michelogiannakis, Kylie Huch, Nirmalendu Patra, and Thom Popovici won the Best Paper Award in the International Symposium on Quality Electronic Design (ISQED'23) for their work “An Area Efficient Superconducting Unary CNN Accelerator.”
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Proceedings Paper accepted towards RAW 2023
Sergiu Mosanu, Joshua Fixelle, Mohammad Nazmus Sakib, Kevin Skadron, and Mircea R. Stan's paper titled "FreezeTime: Towards System Emulation through Architectural Virtualization" has been accepted to be published in the 2023 Reconfigurable Architectures Workshop as part of IEEE International Parallel & Distributed Processing Symposium.
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Congrats to Sergiu for successfully defending his PhD Dissertation
Sergiu Mosani's PhD dissertation titled, "PiMulator: A Processing-in-Memory Emulation Platform," was successfully defended on April 25, 2023. Abstract: Motivated by the memory wall problem, researchers propose numerous Processing-in-Memory (PiM) architectures to bring computation closer to data. Evaluating the performance of these emerging architectures is challenging due to the lack of tools that accurately mimic both software and hardware aspects.
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Poster presentation at tinyML'23
Rahul Sreekumar and Mircea Stan's work titled "StochS-PiM: An event-aware Asynchronous Stochastic Stream based Processing-in-Memory CNN Accelerator" has been presented at tinyML'23 symposium. Congrats to the authors on their accomplishments.
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Conference paper presented at ISQED'23
Jerry Yin and Mircea Stan's paper "A Low Power SRAM with Fully Dynamic Leakage Suppression for IoT Nodes" has been presented at ISQED'23. Congrats to the authors on their accomplishments.
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Yimin Gao gave a talk at UVA Link Lab Flash Talks on Hardware for IoT
Yimin Gao participated in UVA Link Lab Spring 2023 Student Flash Talks, on March 1, 2023. Yimin presented the "elevator pitch" of his research related to Hardware for IoT followed by a Q&A and a poster session.
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Congrats to Yimin for successfully defending their Master's thesis
Yimin Gao's thesis titled, "LiteQAIRISC: System-level Emulation of RISC-V Processor with AI and Mixed-precision Quantization Extensions" was successfully defended in Dec'22. In his work, he integrates an industrial RISC-V processor augmented with AI instructions into the open-source LiteX framework for emulation and validation and further optimize the RISC-V ISA with support for mixed-precision quantization. Congrats to Yimin and wish him a successful career ahead of him.