Lab News
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HPLP is going to be in ISVLSI 2022 with two papers
HPLP is going to present two papers at the IEEE Computer Society Annual Symposium on VLSI (ISVLSI) 2022. They are listed as follows:
"Processing-In-Memory With Temporal Encoding" - authors: Mohammad Nazmus Sakib, Rahul Sreekumar, Xinyuan Zhu, Tommy Tracy II, and Mircea Stan
"Towards Everlasting Flash: Preventing Permanent Flash Cell Damage Using Circadian Rhythms" - authors: M Ceylan Morgul, Xinfei Guo, and Mircea Stan
ISVLSI 2022 is to be held at the Aliathon Resort, Pafos, Cyprus, July 4-6, 2022. -
HPLP is going to present three of its work at TECHCON 2022
HPLP is going to present three of its work at this year's SRC's (Semiconductor Research Company) annual conference TECHCON 2022. They are listed as follows:
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Journal Paper accepted towards Elsevier Integration, the VLSI Journal, 2022
Xinfei Guo, Mohamed El-Hadedy, Sergiu Mosanu, Xiangdong Wei, Kevin Skadron, and Mircea R. Stan's paper titled "Agile-AES: Implementation of configurable AES primitive with agile design approach" has been accepted to be published in the journal of Elsevier Integration, the VLSI Journal, Volume 85, July 2022.
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Congrats to Vaibhav Verma for receiving the Merrill Buckley Jr. Student Project Award
The IEEE Philadelphia Section Awards Ceremony recently announced Vaibhav Verma, as the recipient of the 2022 IEEE Philadelphia Section Merrill Buckley Jr. Student Project Award, for his outstanding contributions towards the AI-RISC research community. Congrats, Vaibhav!
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Vaibhav Verma won the Louis T. Rader Graduate Research Award
We are congratulating Vaibhav Verma on receiving the University of Virginia Charles L. Brown Department of Electrical and Computer Engineering's Louis T. Rader Graduate Research Award.
THE LOUIS T. RADER GRADUATE RESEARCH AWARD recognizes the graduate student who has demonstrated outstanding: (1) academic performance, (2) work ethic, and (3) collegiality, in their later stages of study (more than two semesters from passing the qualifying exam) -
Congratulations to Vaibhav Verma for his successful doctoral dissertation defense
Vaibhav Verma successfully defended her PhD dissertation on “AI-RISC: Scalable RISC-V processor for IoT Edge AI applications”, on the 20th of April, 2022. Congrats, Dr. Vaibhav!
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Paper accepted towards 13TH Annual Non-Volatile Memories Workshop (IIRW) 2022
M. Ceylan Morgul, Xinfei Guo, and Mircea Stan's paper titled, "Circadian Rhythm: A Candidate for Achieving Everlasting Flash Memories" is going to be presented at 13TH Annual Non-Volatile Memories Workshop (IIRW) 2022
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Three of HPLP's works selected as finalist at UVERS 2022, and one won a presentation award
Vaibhav Verma, Mohammad Nazmus Sakib, and M Ceylan Morgul participated University of Virginia Engineering Research Symposium (UVERS) 2022 with their presentation. Vaibhav Verma gave his talk "Complete hardware to software stack co-design for accelerating IoT Edge AI applications"; Mohammad Nazmus Sakib presented their poster "PiMulator: a Fast and Flexible Processing-in-Memory Emulation Platform", in which Sergiu Mosanu and Mohammad Nazmus Sakib were co-authors; M Ceylan Morgul presented his poster "Circadian Rhythm Recovery for Everlasting Flash Memories".
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Vaibhav Verma presented his work about RISC-V based tinyML processor in "tinyML Summit 2022"
Vaibhav Verma presented his poster titled "Co-designing the hardware, ISA and software for RISC-V based tinyML processor" at tinyML Summit 2022.
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We welcome another baby, Marcus, to HPLP
We wish Elisa and Sergiu, current members of HPLP, our most heartfelt wishes on the birth of her baby boy, Marcus. Our team wishes the newborn angel and her mother the best of health and the happiest of smiles. Congrats to Elisa and Sergiu!