E-Textiles

We designed a fully autonomous system-on-chip (SoC) that can be distributed along a fiber strand, capable of simultaneously harvesting energy, cooperatively scaling performance, sharing power, and booting-up with other in-fiber SoCs for ultra-low-power (ULP) sensing applications. Utilizing a custom switched capacitor energy harvesting and power management unit (EHPMU), the SoC can efficiently redistribute and reuse harvested energy along the fiber. Integrated on-chip, the ULP RISC-V digital core and temperature sensor enable energy-efficient sensing and computation at nanowatt power levels. A dedicated ripple boot-up and cooperative dynamic voltage and frequency scaling (DVFS) further optimize the operation and physical size of the system. Fabricated in 65 nm, measurement results show that the proposed SoC achieves 33 nW power consumption for the whole chip under 92 Lux lighting condition and can reduce control power down to 2.7 nW for the EHPMU. With the proposed power sharing and cooperative DVFS techniques, the SoC reduces the illuminance needed to stay alive by >7× down to 12 Lux. Integrated into a mm-scale polymer fiber, our SoC demonstrates the feasibility of fully autonomous and ULP on-body sensing systems in resource-constrained fiber environments.

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We developed "kNOT", a scalable, distributed, and 2-D Network-On-Textile (kNOT) comprising miniaturized systems on chip (SoCs) and bypass SPI (bySPI) networking chiplets that together enable diverse networking and computational tasks. To preserve garment comfort and flexibility, kNOT eliminates bulky boards and interposers through direct-die attachment to embroidered yarns. The SoC features reconfigurable IO pads, global fault-tolerant bootup, and high-precision clock synchronization, while the bySPI chiplet implements a compact, COTS-compatible three-wire SPI protocol supporting group access, soft-reset, and direction-controlled routing. Together, they support distributed programming, synchronized timestamping, and efficient inter-chiplet communication. The chiplets, fabricated in 65-nm CMOS, demonstrate robust operation across a textile network interfacing with commercial sensors and memories. Operating at 1.8 V with on-chip 1.12-V regulation, the SoC consumes power of 1.98 mW at 50 MHz, and bySPI consumes 0.22 mW at 25 MHz. This high integrability and functionality position kNOT as a promising foundation for scalable, garments panning wearable intelligence.

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THReaD is a distributed e-textile computing architecture that targets scalable, fault-tolerant, and energy-efficient communication across chiplets embedded directly into fabrics. The system is built around a 2D mesh of two types of nodes: compute/sensing SoC chiplets and power-management (PMU) chiplets, all connected using a custom 2-wire bidirectional SPI-derived protocol called 2DSPI. This enables dense integration on textiles while keeping wiring minimal, which is critical for flexibility and wearability.

The key contribution is combining a hierarchical area-based routing scheme with decentralized mesh networking and built-in fault detection/recovery. Packets are first routed between “areas” using lookup tables, then within each area using XY mesh routing, allowing the system to adapt to irregular topologies and broken links. Communication is fully packet-switched and supports bidirectional forwarding with acknowledgment-based reliability, achieving up to 22.8 Mbps per node. On the power side, PMU chiplets cooperate using switched-capacitor voltage regulation to share load current and improve efficiency, enabling up to 4.6× higher current delivery and about 4.2× power reduction compared to LDO-only designs.

Overall, the work demonstrates a practical, chiplet-level foundation for “smart textiles” where computation, communication, and power are all distributed rather than centralized. It shows that you can get NoC-like mesh benefits (throughput, scalability, fault tolerance) in a physically flexible fabric system by co-designing routing, signaling, and power management at the hardware level.

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We developed a scalable, cooperative, fully on-chip switched-capacitor voltage regulator (SCVR) for distributed power delivery networked E-textile applications. The design enables multiple chips to act in parallel to scale output current and improve load regulation. Utilizing a proposed voltage matching technique to mitigate charge redistribution and current imbalances, the system achieves a peak efficiency exceeding 72.5% from one to six SCVRs in parallel. The output current at peak efficiency increased by 8.6× with six SCVRs compared with just one SCVR. The proposed circuits have also been integrated on a textile swatch and demonstrated cooperatively powering an in-textile system to deliver 1.8 V from a 3.0 V input supply.

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We created a 0.36-mm2 I2C-to-SPI converter chip designed for electronic textile (E-textile) applications, featuring an on-the-fly conversion scheme that eliminates the need for on-chip data buffers and internal clock generation. By leveraging the synchronous nature of both I2C and SPI protocols, the proposed design forwards each incoming I2C data bit, SDA (Serial Data Line) directly to the SPI output using the I2C serial clock line (SCL), thereby reducing both area and power consumption. Two versions of the chip are proposed: a ‘full’ die and a ‘compact’ die. The converter enables seamless integration into distributed in-textile architectures by minimizing silicon overhead. The ‘full’ die implementation achieves a 7:33x area reduction compared to commercially available I2Cto-SPI converters, while the ‘compact’ version further reduces the footprint by 14:73x through the use of a small corner seal-ring and a linear pad ring layout. Measurement results confirm robust operation at ultra-fast I2C frequency (5 MHz), consuming only 0.379 mW for the ‘full’ die and 0.333 mW for the ‘compact’ variant. At standard I2C speeds (400 kHz), the converter demonstrates a 48 improvement (‘full’ die) in power efficiency over commercial o-the-shelf (COTS) solutions, making it an effective and unobtrusive solution for next-generation E-textile systems.

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