Wake-up Receivers
Digitally Reconfigurable Bit-Level Duty-Cycled Wakeup and Data Receiver
A -108dBm sensitivity, 430MHz, 130nW-41µW, 6.25bps-4.2kbps, digitally tunable wake-up and data receiver in 65nm CMOS is presented. Employing 2-tone RF OOK modulation and an AlN MEMS resonator, the receiver attains close-in SIR of -25dB at 0.12% and far-out SIR of -28dB at 0.7% frequency offset from the carrier. Digitally configurable dynamic ranges of 11dB, 410X, 672X are achieved for sensitivity, power, and latency, respectively. The design receives data at a 4.2kbps bit-rate at - 108dBm sensitivity while consuming 41µW.
The proposed WuRx is a highly reconfigurable and interference robust candidate for emerging ultra-long range IoT LPWAN applications.Read moreabout Digitally Reconfigurable Bit-Level Duty-Cycled Wakeup and Data Receiver
Within-Packet Duty-Cycled Wake-Up Receiver
This work presents a highly integrated 2.4-GHz wake-up receiver (WuRX) achieving 91.5 dBm sensitivity with a state-of-the-art power and latency combination of 2 µW at 100 ms. The proposed within-packet duty-cycling method employs a carrier-sense mechanism to turn off the WuRX early under idle channel conditions, which reduces the dc-power compared with conventional asynchronous packet-level duty cycling by 9× at 10 ms latency (21 µW) and 2× at 1 s latency (0.9 µW) at the cost of 2 dB in sensitivity.
The uncertain-IF topology with a phase-locked loop (PLL)-aided event-driven calibrated local-oscillator (LO) helps reduce the dc-power while maintaining a fast startup.
The channel-embedded OOK scheme is used to create a deterministic IF to enable baseband (BB) channel selection and achieve continuous wave (CW) interference tolerance of −47 dB at 20 MHz offset. Fabricated in 65 nm CMOS, input matching and LC oscillator are all implemented on-chip, and operation is demonstrated with integrated low dropout regulators to capture the degradations in realistic system integration.
Advancements in power and size reduction for integrated circuits (IC) enable integration of self-powered systems into mm-scale fiber strand. Moving towards intricate fiber networks where multiple subsystems interact within textiles or garments, energy harvesting and power management units (EHPMU) require full autonomy, ultra-low quiescent power, high efficiency, and a mm-scale footprint. Additionally, they must coordinate energy across distributed subsystems for enhanced system viability and scalability. A switched-capacitor (SC) based ultra-low-power (ULP) EHPMU [1] realizes distributed energy sharing but its cascade structure restricts the efficiency and dynamic range (<5µW). Also, its single-rail-sharing architecture for distributed systems forces all subsystems to interact with a shared rail, necessitating extra dedicated converters, thereby increasing cost. Existing multi-input single-inductor multi-output (MISIMO) EHPMUs [2-7] achieve high efficiency with a single power-delivery stage, but they either consume >100nW quiescent power [3-7], have <1000× dynamic range [3][5], lack full autonomy [3][4][6][7], or require large inductor (22µH) with low efficiency due to conventional buck-boost (CBB) conversion [2]. Furthermore, none of them support distributed systems. As shown in the top of Fig. 1, we address these limitations with a fully autonomous triple-input hybrid-inductor-capacitor multi-output (TIHICMO) EHPMU that can harvest energy from dual input sources, regulate three custom output rails, adaptively switch among multi-conversion methods, cold startup (CS) from all the inputs/outputs, and enable energy recycling and sharing among multiple rails. This EHPMU achieves a 5.8nA quiescent current, a wide dynamic range of 8.8x104, a peak efficiency of 90.1%, and a >90% reduction in inductor size compared to [2][7] using a 3×3×1.3mm 200mΩ DCR inductor.
RELATED PUBLICATIONS
A. Agrawal, Liu, X., Truesdell, D. S., and Calhoun, B. H., “Characterization of Stacked PV Cell Configurations in a Deep N-Well 65nm CMOS Technology”, in 2025 IEEE International Symposium on Circuits and Systems (ISCAS), 2025.
O. Faruqe, Chen, Z., Bhattacharya, S., Foysal, M. Fahim, Hasan, S., Wang, J., Truesdell, D. S., and Calhoun, B. H., “A Compact, Power-Efficient, and On-the-Fly I2C-to-SPI Converter for Distributed E-Textile Systems”, IEEE Transactions on Circuits and Systems I: Regular Papers, 2025.
O. Faruqe, Le, P., Lee, D., Liu, X., Abdelatty, O., Truesdell, D. S., and Calhoun, B. H., “A Fully Integrated, Custom End-to-End PPG Sensing System for Ultra-Low Power Wearables”, in 2025 IEEE International Symposium on Circuits and Systems (ISCAS), 2025.